| FPGAwars/icestudio |
1,621 |
|
0 |
0 |
about 2 years ago |
0 |
|
117 |
gpl-2.0 |
JavaScript |
| :snowflake: Visual editor for open FPGA boards |
| platformio/platformio-vscode-ide |
1,104 |
|
2 |
2 |
over 2 years ago |
25 |
February 04, 2022 |
175 |
apache-2.0 |
JavaScript |
| PlatformIO IDE for VSCode: The next generation integrated development environment for IoT |
| platformio/platformio-atom-ide |
474 |
|
0 |
0 |
over 5 years ago |
0 |
|
20 |
apache-2.0 |
JavaScript |
| PlatformIO IDE for Atom: The next generation integrated development environment for IoT |
| GadgetFactory/Arduino-Soft-Core |
58 |
|
0 |
0 |
over 12 years ago |
0 |
|
2 |
|
VHDL |
| FPGAwars/apio-ide |
56 |
|
0 |
0 |
over 6 years ago |
0 |
|
8 |
gpl-3.0 |
JavaScript |
| :seedling: Experimental open FPGA IDE using Atom and Apio |
| TerosTechnology/terosHDL |
55 |
|
0 |
0 |
almost 6 years ago |
0 |
|
19 |
gpl-3.0 |
JavaScript |
| The goal of TerosHDL is make the FPGA development easier and reliable. It is a powerful open source IDE. |
| electron-lang/electron |
46 |
|
3 |
4 |
over 7 years ago |
15 |
August 20, 2018 |
25 |
|
TypeScript |
| A mixed signal netlist language (pre-alpha) |
| Adancurusul/EveIDE_LIGHT |
41 |
|
0 |
0 |
almost 4 years ago |
0 |
|
0 |
lgpl-2.1 |
JavaScript |
| A lightweight IDE that supports verilog simulation and RISC-V code compilation |
| nturley/synthia |
8 |
|
0 |
0 |
almost 10 years ago |
0 |
|
0 |
mit |
Python |
| an IDE that uses myHDL, yosys, and arachne-pnr to target the ICEStick |
