| dgschwend/zynqnet |
510 |
|
0 |
0 |
almost 9 years ago |
0 |
|
38 |
gpl-3.0 |
HTML |
| Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network" |
| hunterlew/convolution_network_on_FPGA |
187 |
|
0 |
0 |
about 8 years ago |
0 |
|
15 |
|
Verilog |
| CNN acceleration on virtex-7 FPGA with verilog HDL |
| WalkerLau/Accelerating-CNN-with-FPGA |
164 |
|
0 |
0 |
over 6 years ago |
0 |
|
1 |
other |
C++ |
| This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU. |
| QShen3/CNN-FPGA |
109 |
|
0 |
0 |
almost 8 years ago |
0 |
|
3 |
mit |
Verilog |
| 使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用 |
| 19801201/SpinalHDL_CNN_Accelerator |
103 |
|
0 |
0 |
over 2 years ago |
0 |
|
2 |
gpl-3.0 |
Scala |
| CNN accelerator implemented with Spinal HDL |
| ilaydayaman/CNN_for_SLR |
79 |
|
0 |
0 |
over 2 years ago |
0 |
|
0 |
bsd-2-clause |
Verilog |
| A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA. |
| dem123456789/FPGA-CNN |
76 |
|
0 |
0 |
about 8 years ago |
0 |
|
0 |
mit |
Verilog |
| FPGA implementation of Cellular Neural Network (CNN) |
| TF2-Engine/TF2 |
74 |
|
0 |
0 |
almost 6 years ago |
0 |
|
12 |
apache-2.0 |
Python |
| An Open Source Deep Learning Inference Engine Based on FPGA |
| DreamIP/haddoc2 |
68 |
|
0 |
0 |
almost 6 years ago |
0 |
|
5 |
bsd-2-clause |
VHDL |
| Caffe to VHDL |
| lulinchen/cnn_open |
60 |
|
0 |
0 |
over 7 years ago |
0 |
|
0 |
|
Coq |
| A hardware implementation of CNN, written by Verilog and synthesized on FPGA |
