| firesim/firesim |
778 |
|
0 |
0 |
about 2 years ago |
0 |
|
218 |
other |
Scala |
| FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility |
| ucsdsysnet/SweepSense |
23 |
|
0 |
0 |
over 2 years ago |
0 |
|
2 |
apache-2.0 |
Python |
| FPGA code and Python API for adding chirp functionality to USRP N210 with CBX daughter board, after the required hardware modification. |
| uwsampa/hfbs |
15 |
|
0 |
0 |
over 8 years ago |
0 |
|
1 |
mit |
Python |
| a hardware-friendly bilateral solver |
| GraphSAINT/GraphACT |
10 |
|
0 |
0 |
about 5 years ago |
0 |
|
1 |
|
Python |
| [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms" |
| asonnino/fourier-transmitter |
9 |
|
0 |
0 |
about 5 years ago |
0 |
|
0 |
gpl-3.0 |
HTML |
| A variable FPGA-based QAM transmitter with scalable mixed time and frequency domain signal processing. |
| TadejMurovic/BNN_Deployment |
6 |
|
0 |
0 |
almost 7 years ago |
0 |
|
0 |
|
MATLAB |
| Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing |
| martinferianc/Improving_Per_Esti_for_FPGA-based_Acc_for_CNNs-ARC2020 |
6 |
|
0 |
0 |
almost 6 years ago |
0 |
|
0 |
apache-2.0 |
Jupyter Notebook |
| A codebase accompanying the paper "Improving Performance Estimation for FPGA-based Accelerators for Convolutional Neural Networks", by Ferianc et al. presented at ARC'2020 |
| ivanvig/2dconv-FPGA |
6 |
|
0 |
0 |
over 5 years ago |
0 |
|
0 |
mit |
Verilog |
| A 2D convolution hardware implementation written in Verilog |
| vishal1303/Shoal |
5 |
|
0 |
0 |
almost 7 years ago |
0 |
|
0 |
|
Bluespec |
| A Network Architecture for Disaggregated Racks |
| pc2/cannon-fpga |
5 |
|
0 |
0 |
over 6 years ago |
0 |
|
0 |
mit |
C |
