| hunterlew/convolution_network_on_FPGA |
187 |
|
0 |
0 |
about 8 years ago |
0 |
|
15 |
|
Verilog |
| CNN acceleration on virtex-7 FPGA with verilog HDL |
| Gowtham1729/Image-Processing |
123 |
|
0 |
0 |
over 2 years ago |
0 |
|
0 |
apache-2.0 |
VHDL |
| Image Processing Toolbox in Verilog using Basys3 FPGA |
| ZFTurbo/MobileNet-in-FPGA |
96 |
|
0 |
0 |
almost 4 years ago |
0 |
|
3 |
|
Verilog |
| Generator of verilog description for FPGA MobileNet implementation |
| chenhaoc/cnnhwpe |
46 |
|
0 |
0 |
almost 4 years ago |
0 |
|
2 |
|
Verilog |
| AniketBadhan/Convolutional-Neural-Network |
37 |
|
0 |
0 |
over 8 years ago |
0 |
|
4 |
|
Verilog |
| Implementation of CNN using Verilog |
| hukenovs/fp23fftk |
31 |
|
0 |
0 |
almost 4 years ago |
0 |
|
0 |
gpl-3.0 |
VHDL |
| Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL). |
| romulus0914/CNN_VGG19_verilog |
20 |
|
0 |
0 |
over 8 years ago |
0 |
|
2 |
|
Verilog |
| Convolution Neural Network of vgg19 model in verilog |
| usmanwardag/sobel |
9 |
|
0 |
0 |
about 9 years ago |
0 |
|
1 |
|
Verilog |
| Implementation of Sobel Filter in Verilog |
| ac-optimus/Convolution-using-systolic-arrays |
8 |
|
0 |
0 |
over 7 years ago |
0 |
|
0 |
|
Verilog |
| damdoy/fpga_image_processing |
6 |
|
0 |
0 |
over 6 years ago |
0 |
|
0 |
|
Verilog |
| IP operations in verilog (simulation and implementation on ice40) |
