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The Top 10 Verilog Open Source Projects
Open source projects categorized as Verilog
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Hardware
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Verilog
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logisim-evolution/logisim-evolution
⭐
6,725
Digital logic design tool and simulator
dependent packages
0
total releases
0
most recent commit
3 months ago
chipsalliance/chisel
⭐
3,593
Chisel: A Modern Hardware Design Language
dependent packages
0
total releases
0
most recent commit
about 2 years ago
hneemann/Digital
⭐
3,476
A digital logic designer and circuit simulator.
dependent packages
0
total releases
0
most recent commit
about 2 years ago
open-sdr/openwifi
⭐
3,363
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
dependent packages
0
total releases
0
most recent commit
over 2 years ago
YosysHQ/yosys
⭐
2,998
Yosys Open SYnthesis Suite
dependent packages
0
total releases
0
most recent commit
about 2 years ago
steveicarus/iverilog
⭐
2,521
Icarus Verilog
dependent packages
0
total releases
0
most recent commit
about 2 years ago
SpinalHDL/VexRiscv
⭐
2,135
A FPGA friendly 32 bit RISC-V CPU implementation
dependent packages
0
total releases
0
most recent commit
over 2 years ago
verilator/verilator
⭐
1,934
Verilator open-source SystemVerilog simulator and lint system
dependent packages
0
total releases
0
most recent commit
about 2 years ago
SpinalHDL/SpinalHDL
⭐
1,912
Scala based HDL
dependent packages
0
total releases
0
most recent commit
3 months ago
jbush001/NyuziProcessor
⭐
1,863
GPGPU microprocessor architecture
dependent packages
0
total releases
0
most recent commit
about 2 years ago
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