| geohot/fromthetransistor |
1,607 |
|
0 |
0 |
over 4 years ago |
0 |
|
16 |
|
|
| From the Transistor to the Web Browser, a rough outline for a 12 week course |
| bmartini/zynq-axis |
61 |
|
0 |
0 |
over 7 years ago |
0 |
|
1 |
other |
Verilog |
| Hardware, Linux Driver and Library for the Zynq AXI DMA interface |
| wingel/sds7102 |
39 |
|
0 |
0 |
over 9 years ago |
0 |
|
0 |
other |
Verilog |
| A port of Linux to the OWON SDS7102 scope |
| sumanth-kalluri/cnn_hardware_acclerator_for_fpga |
32 |
|
0 |
0 |
over 5 years ago |
0 |
|
1 |
|
Verilog |
| This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs |
| defparam/BAR-Tender |
30 |
|
0 |
0 |
almost 8 years ago |
0 |
|
1 |
mit |
Verilog |
| An FPGA I/O Device which services physical memory reads/writes via UMDF2 driver |
| UofT-HPRC/fpga-bpf |
17 |
|
0 |
0 |
almost 5 years ago |
0 |
|
0 |
other |
Verilog |
| A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark |
| zainryan/INSIDER-System |
17 |
|
0 |
0 |
over 5 years ago |
0 |
|
0 |
mit |
Verilog |
| An FPGA-based full-stack in-storage computing system. |
| techmexdev/fromthetransistor |
15 |
|
0 |
0 |
over 3 years ago |
0 |
|
0 |
|
Verilog |
| From the Transistor to the Web Browser, a rough outline for a 12 week course. |
| usmanwardag/sobel |
9 |
|
0 |
0 |
about 9 years ago |
0 |
|
1 |
|
Verilog |
| Implementation of Sobel Filter in Verilog |
| pcie-bench/pciebench-netfpga |
8 |
|
0 |
0 |
over 7 years ago |
0 |
|
0 |
other |
Verilog |
| pcie-bench code for NetFPGA/VCU709 cards |
