| nvdla/hw |
1,254 |
|
0 |
0 |
about 4 years ago |
0 |
|
193 |
other |
Verilog |
| RTL, Cmodel, and testbench for NVDLA |
| FedericoSerafini/HLS-CNN |
19 |
|
0 |
0 |
over 2 years ago |
0 |
|
0 |
mit |
C |
| High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition. |
| Baltoli/accsynt |
17 |
|
0 |
0 |
over 3 years ago |
0 |
|
1 |
|
C++ |
| Program synthesis tools and utilities for LLVM. |
| cornell-brg/pymtl-tut-hls |
8 |
|
0 |
0 |
almost 10 years ago |
0 |
|
0 |
|
C++ |
| Tutorial for integrating PyMTL and Vivado HLS |
| amohant4/HLS_for_CNN |
7 |
|
0 |
0 |
over 8 years ago |
0 |
|
0 |
|
C |
| This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera. |
| systems-lunch/systems-lunch |
5 |
|
0 |
0 |
almost 3 years ago |
0 |
|
0 |
|
|
| UMass CS Systems Lunch, organized by Emery Berger |
