| pulp-platform/axi |
834 |
|
0 |
0 |
over 2 years ago |
0 |
|
49 |
other |
SystemVerilog |
| AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication |
| osresearch/up5k |
53 |
|
0 |
0 |
almost 5 years ago |
0 |
|
1 |
|
Verilog |
| Upduino v2 with the ice40 up5k FPGA demos |
| skiphansen/pano_man |
24 |
|
0 |
0 |
over 6 years ago |
0 |
|
0 |
|
VHDL |
| Simulation of the classic Pacman arcade game on a PanoLogic thin client. |
| bluecmd/fejkon |
22 |
|
0 |
0 |
almost 5 years ago |
0 |
|
22 |
gpl-3.0 |
Tcl |
| Fibre Channel / FICON HBA implemented on FPGA |
| Obijuan/Z80-FPGA |
17 |
|
0 |
0 |
over 6 years ago |
0 |
|
2 |
gpl-3.0 |
Assembly |
| Z80 CPU for OpenFPGAs, with Icestudio |
| zuloloxi/mecrisp-ice |
17 |
|
0 |
0 |
over 9 years ago |
0 |
|
2 |
bsd-3-clause |
Forth |
| http://mecrisp.sourceforge.net/ Mecrisp-Ice is an enhanced version of Swapforth and the J1a stack processor by James Bowman, featuring three MSP430 style IO ports, a tick counter, constant folding, inlining and tail-call optimisations |
| zeldin/MapleMojo |
13 |
|
0 |
0 |
almost 5 years ago |
0 |
|
0 |
bsd-2-clause |
C |
| Maple bus for the Mojo FPGA board |
| ACMClassCourses/MS108-2020 |
13 |
|
0 |
0 |
about 5 years ago |
0 |
|
2 |
|
C++ |
| skiphansen/panog2_linux |
8 |
|
0 |
0 |
almost 3 years ago |
0 |
|
1 |
|
Makefile |
| Prebuilt images for Linux for the Pano Logic G2 |
| fransschreuder/entity-block |
7 |
|
0 |
0 |
almost 3 years ago |
0 |
|
0 |
gpl-3.0 |
C++ |
| Creates a .SVG symbol from a VHDL entity. Colors and some other properties can be adjusted. |
