| vortexgpgpu/vortex |
939 |
|
0 |
0 |
about 2 years ago |
0 |
|
51 |
apache-2.0 |
Verilog |
| EttusResearch/uhd |
869 |
|
0 |
3 |
over 2 years ago |
11 |
September 14, 2022 |
93 |
other |
Verilog |
| The USRP™ Hardware Driver Repository |
| CMU-SAFARI/SoftMC |
103 |
|
0 |
0 |
over 2 years ago |
0 |
|
1 |
mit |
Verilog |
| SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. The design, the interface, and its capabilities and limitations are discussed in our HPCA 2017 paper: "SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies" <https://people.inf.ethz.ch/omutlu/pub/softMC_hpca17.pdf> |
| bmartini/zynq-axis |
61 |
|
0 |
0 |
over 7 years ago |
0 |
|
1 |
other |
Verilog |
| Hardware, Linux Driver and Library for the Zynq AXI DMA interface |
| ZipCPU/qspiflash |
43 |
|
0 |
0 |
over 3 years ago |
0 |
|
2 |
|
Verilog |
| A set of Wishbone Controlled SPI Flash Controllers |
| defparam/BAR-Tender |
30 |
|
0 |
0 |
almost 8 years ago |
0 |
|
1 |
mit |
Verilog |
| An FPGA I/O Device which services physical memory reads/writes via UMDF2 driver |
| hustrlee/HUST-Verilog-Course |
25 |
|
0 |
0 |
almost 5 years ago |
0 |
|
0 |
mit |
|
| 华中科技大学计算机学院 Verilog 语言课程 |
| mzakharo/usb-de2-fpga |
22 |
|
0 |
0 |
over 4 years ago |
0 |
|
0 |
gpl-3.0 |
Verilog |
| Hardware interface for USB controller on DE2 FPGA Platform |
| no2fpga/no2hub75 |
13 |
|
0 |
0 |
almost 4 years ago |
0 |
|
0 |
other |
Verilog |
| Nitro HUB75 LED panel driver FPGA core |
| warclab/dyract |
12 |
|
0 |
0 |
almost 10 years ago |
0 |
|
1 |
|
Verilog |
| DyRACT Open Source Repository |
