| ZipCPU/sdr |
56 |
|
0 |
0 |
about 2 years ago |
0 |
|
0 |
|
Verilog |
| A basic Soft(Gate)ware Defined Radio architecture |
| dawsonjon/FPGA-TX |
52 |
|
0 |
0 |
about 9 years ago |
0 |
|
0 |
mit |
Verilog |
| FPGA based transmitter |
| ben-marshall/uart |
25 |
|
0 |
0 |
over 4 years ago |
0 |
|
1 |
mit |
Verilog |
| A simple implementation of a UART modem in Verilog. |
| ZipCPU/wbfmtx |
19 |
|
0 |
0 |
about 2 years ago |
0 |
|
0 |
|
Verilog |
| A wishbone controlled FM transmitter hack |
| phthinh/OFDM_802_11 |
11 |
|
0 |
0 |
over 8 years ago |
0 |
|
0 |
|
Verilog |
| tomverbeure/color3 |
9 |
|
0 |
0 |
about 6 years ago |
0 |
|
0 |
mit |
Verilog |
| Information about eeColor Color3 HDMI FPGA board |
| asonnino/fourier-transmitter |
9 |
|
0 |
0 |
about 5 years ago |
0 |
|
0 |
gpl-3.0 |
HTML |
| A variable FPGA-based QAM transmitter with scalable mixed time and frequency domain signal processing. |
| stffrdhrn/uart |
9 |
|
0 |
0 |
over 11 years ago |
0 |
|
0 |
|
Verilog |
| Verilog uart receiver and transmitter modules for De0 Nano |
| marsohod4you/Fpga-PM-Radio |
9 |
|
0 |
0 |
almost 9 years ago |
0 |
|
0 |
|
Verilog |
| Implement Phase Modulation Radio Transmitter in FPGA Altera MAX10, with Marsohod3bis FPGA board. |
| mattzgto/bladerf-dvbs2 |
9 |
|
0 |
0 |
about 8 years ago |
0 |
|
0 |
|
Verilog |
| 16-APSK DVB-S2 Transmitter for BladeRF |
