| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| azonenberg/antikernel | 65 | 0 | 0 | almost 6 years ago | 0 | 1 | Verilog | |||
| The Antikernel operating system project | ||||||||||
| Pconst167/sol-1 | 57 | 0 | 0 | over 2 years ago | 0 | 1 | C | |||
| Sol-1: A CPU/Computer System made from 74 series logic. | ||||||||||
| SilenceX12138/MIPS-Microsystems | 45 | 0 | 0 | over 4 years ago | 0 | 0 | mit | Verilog | ||
| A computer system containing CPU, OS and Compiler under MIPS architecture. | ||||||||||
| sabertazimi/hust-lab | 31 | 0 | 0 | 3 months ago | 0 | 0 | mit | C | ||
| Labs for computer science: C, assembly, data structure, CSAPP, HSI, Matlab, digital logic, Verilog, compilers, operating systems | ||||||||||
| oscomp/proj7-terminus | 19 | 0 | 0 | about 5 years ago | 0 | 0 | mit | |||
| 可运行OS的RISCV-64的硬件模拟器设计与实现 | ||||||||||
| disaderp/automatic-chainsaw | 8 | 0 | 0 | over 7 years ago | 0 | 8 | gpl-3.0 | Verilog | ||
| A custom 16-bit computer | ||||||||||
| TonyCrane/CraneCPU | 7 | 0 | 0 | almost 3 years ago | 0 | 0 | mit | Verilog | ||
| RISC-V SingleCycle/Pipeline CPU (lab of ZJU Computer System Series) | ||||||||||
