| stnolting/neorv32 |
1,337 |
|
0 |
0 |
about 2 years ago |
0 |
|
15 |
bsd-3-clause |
VHDL |
| 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. |
| platformio/platformio-vscode-ide |
1,104 |
|
2 |
2 |
over 2 years ago |
25 |
February 04, 2022 |
175 |
apache-2.0 |
JavaScript |
| PlatformIO IDE for VSCode: The next generation integrated development environment for IoT |
| platformio/platformio-atom-ide |
474 |
|
0 |
0 |
over 5 years ago |
0 |
|
20 |
apache-2.0 |
JavaScript |
| PlatformIO IDE for Atom: The next generation integrated development environment for IoT |
| onchipuis/mriscv |
94 |
|
0 |
0 |
about 8 years ago |
0 |
|
0 |
other |
Verilog |
| A 32-bit Microcontroller featuring a RISC-V core |
| rgwan/kamikaze |
88 |
|
0 |
0 |
about 9 years ago |
0 |
|
1 |
|
Verilog |
| Light-weight RISC-V RV32IMC microcontroller core. |
| jbush001/LispMicrocontroller |
85 |
|
0 |
0 |
about 2 years ago |
0 |
|
7 |
apache-2.0 |
Python |
| A microcontroller that natively executes a simple LISP dialect |
| jefflieu/recon |
18 |
|
0 |
0 |
over 7 years ago |
0 |
|
2 |
gpl-3.0 |
Verilog |
| The RECON project creates library for Nios II Microcontroller System and Tool chain. The library includes a collection of hardware configurations and Arduino-style software APIs. |
| saursin/riscv-atom |
14 |
|
0 |
0 |
over 2 years ago |
0 |
|
2 |
mit |
C++ |
| An open-source 32-bit RISC-V soft-core processor for FPGAs. |
| osresearch/risc8 |
13 |
|
0 |
0 |
over 4 years ago |
0 |
|
1 |
|
Verilog |
| Mostly AVR compatible FPGA soft-core |
| onchipuis/mriscv_vivado |
12 |
|
0 |
0 |
about 9 years ago |
0 |
|
0 |
mit |
Verilog |
| A 32-bit Microcontroller for NEXYS4-DDR fpga based on mriscv. |
