| sylefeb/Silice |
1,199 |
|
0 |
0 |
about 2 years ago |
0 |
|
73 |
other |
C++ |
| Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures. |
| brianwchh/grassrootsstartup-ComputerVsion-zynq |
35 |
|
0 |
0 |
almost 3 years ago |
0 |
|
0 |
other |
C |
| sabertazimi/hust-lab |
31 |
|
0 |
0 |
3 months ago |
0 |
|
0 |
mit |
C |
| Labs for computer science: C, assembly, data structure, CSAPP, HSI, Matlab, digital logic, Verilog, compilers, operating systems |
| nbrummel/SIFT-implementation-in-Verilog |
21 |
|
0 |
0 |
over 12 years ago |
0 |
|
0 |
|
|
| Using Verilog to implement the SIFT algorithm into an FPGA for small robotic situations |
| ISKU/FAST9-Accelerator |
21 |
|
0 |
0 |
over 5 years ago |
0 |
|
0 |
mit |
Verilog |
| FAST-9 Accelerator for Corner Detection |
| slongfield/StereoCensus |
20 |
|
0 |
0 |
over 4 years ago |
0 |
|
0 |
gpl-3.0 |
Verilog |
| Verilog Implementation of the Census Transform Stereo Vision algorithm |
| MorrisMA/Booth_Multipliers |
19 |
|
0 |
0 |
over 5 years ago |
0 |
|
0 |
|
Verilog |
| Parameterized Booth Multiplier in Verilog 2001 |
| kim-sunghoon/Study-materials |
12 |
|
0 |
0 |
about 3 years ago |
0 |
|
0 |
mit |
|
| BWbwchen/Coding_Practice |
11 |
|
0 |
0 |
over 2 years ago |
0 |
|
7 |
|
C++ |
| This is the code I write for school, and some little code which is fun. Just recording what I learned. |
| ipcoregarfield/GEM_Project |
9 |
|
0 |
0 |
almost 10 years ago |
0 |
|
0 |
gpl-3.0 |
Matlab |
| There are the documents, floating and fixed-point algorithms, and Verilog codes for the project. |
